Associate Professor School of Microelectronics
Chenchang Zhan is an Associate Professor with the School of Microelectronics (National Exemplary School of Microelectronics), the Southern University of Science and Technology (SUSTech), Shenzhen, China. He received the B.Sc. degree in electrical engineering and the M.Sc. degree in microelectronics from Fudan University, Shanghai, China, in 2004 and 2007, respectively, and the Ph.D. degree in electronic and computer engineering from the Hong Kong University of Science and Technology (HKUST), Hong Kong SAR, China, in 2011. From 2006 to 2007, he was an Intern Analog Design Engineer with VeriSilicon, Shanghai, China. From 2011 to 2012, he worked as a post-doctoral Research Associate with HKUST. From 2012 to 2014, he was with Qualcomm Inc., San Diego, CA, as a Senior Engineer, focusing on the design of high-performance power converters for future generations of mobile devices. He then joined SUSTech as an Assistant Professor in Aug. 2014, and was promoted to an Associate Professor in Dec. 2019. His research interests include the analysis and design of analog, mixed-signal and power management integrated circuits and systems for a variety of applications. Up to date, he published 1 book, >70 SCI/EI papers, and was granted with 8 China and 5 US patents. He received the Best Paper Award from IEEE ISIC'2009, Singapore and IEEE EDSSC'2018, Shenzhen, the Best Student Paper Award from IEEE EDSSC'2010, Hong Kong, the Best Student Paper Award from IEEE ISCAS'2011, Rio de Janeiro, Brazil, the 2018 SUSTech Young Faculty Research Award, the 2019 SUSTech Excellent Teacher of the Year Award, the 2019 SUSTech Excellent Residential College Mentor of the Year Award, and the 2020 SUSTech 5-Year Service Award. He served as a Review Committee Member for IEEE APCCAS'2014, a Technical Program Committee member for IEEE ICTA'2018, ICTA’2019 and ICTA’2020, a Guest Editor for Hindawi APEC, a Session Chair/Co-Chair for IEEE ISCAS'2018, ISCAS'2019 and ICTA'2018, as well as a reviewer for many reputational international journals and conferences. He is a Senior Member of IEEE.
Personal Profile
Chenchang Zhan is an Associate Professor with the School of Microelectronics (National Exemplary School of Microelectronics), the Southern University of Science and Technology (SUSTech), Shenzhen, China. He received the B.Sc. degree in electrical engineering and the M.Sc. degree in microelectronics from Fudan University, Shanghai, China, in 2004 and 2007, respectively, and the Ph.D. degree in electronic and computer engineering from the Hong Kong University of Science and Technology (HKUST), Hong Kong SAR, China, in 2011. From 2006 to 2007, he was an Intern Analog Design Engineer with VeriSilicon, Shanghai, China. From 2011 to 2012, he worked as a post-doctoral Research Associate with HKUST. From 2012 to 2014, he was with Qualcomm Inc., San Diego, CA, as a Senior Engineer, focusing on the design of high-performance power converters for future generations of mobile devices. He then joined SUSTech as an Assistant Professor in Aug. 2014, and was promoted to an Associate Professor in Dec. 2019. His research interests include the analysis and design of analog, mixed-signal and power management integrated circuits and systems for a variety of applications. Up to date, he published 1 book, >70 SCI/EI papers, and was granted with 8 China and 5 US patents. He received the Best Paper Award from IEEE ISIC'2009, Singapore and IEEE EDSSC'2018, Shenzhen, the Best Student Paper Award from IEEE EDSSC'2010, Hong Kong, the Best Student Paper Award from IEEE ISCAS'2011, Rio de Janeiro, Brazil, the 2018 SUSTech Young Faculty Research Award, the 2019 SUSTech Excellent Teacher of the Year Award, the 2019 SUSTech Excellent Residential College Mentor of the Year Award, and the 2020 SUSTech 5-Year Service Award. He served as a Review Committee Member for IEEE APCCAS'2014, a Technical Program Committee member for IEEE ICTA'2018, ICTA’2019 and ICTA’2020, a Guest Editor for Hindawi APEC, a Session Chair/Co-Chair for IEEE ISCAS'2018, ISCAS'2019 and ICTA'2018, as well as a reviewer for many reputational international journals and conferences. He is a Senior Member of IEEE.
Education
2007-2011, Ph.D. in electronic and computer engineering, Hong Kong University of Science and Technology
2004-2007, M.Sc. in microelectronics, Fudan University
2000-2004, B.Sc. in electrical engineering, Fudan University
Work Experiences
2019-present, Associate Professor, Southern University of Science and Technology
2014-2019, Assistant Professor, Southern University of Science and Technology
2012-2014, Senior Engineer, Qualcomm Inc., San Diego, CA
2011-2012, Postdoctoral Research Associate, Hong Kong University of Science and Technology
2006-2007, Intern Analog Design Engineer, VeriSilicon, Shanghai, China
Research Areas
Power management and energy harvesting integrated circuits and systems
Analog and mixed-signal integrated circuits
Low-power integrated circuit design methodology
Honors and Awards
2020, SUSTech 5-Years Service Award
2019, Elevated to be IEEE Senior Member
2019, SUSTech Excellent Teacher of the Year Award
2019, SUSTech Excellent Residential College Mentor of the Year Award
2018, SUSTech Young Faculty Research Award
2018, Best Paper Award, IEEE EDSSC
2017, Excellent Advisor Award, SUSTech Innovation and Entrepreneurship Competition
2016, Excellent Advisor Award, National University IC Design Competition (NUICDC)
2016, SUSTech Excellent Individual for UG Admission Initiatives
2016, SUSTech Shuren Residential College Mentor of the Year Award
2016, Nanshan Leading Talent Tier C, Nanshan District, Shenzhen, Guangdong
2014, Peacock Talent Tier C, Shenzhen, Guangdong
2011, Best Student Paper Award, IEEE ISCAS
2010, Best Student Paper Award, IEEE EDSSC
2009, Best Paper Award, IEEE ISIC
2009, Best Paper Award Nomination, IEEE ISCAS
Research
Power management and energy harvesting integrated circuits and systems
Analog and mixed-signal integrated circuits
Low-power integrated circuit design methodology
ResearcherID Link: https://publons.com/researcher/1807217/chenchang-zhan/
Google Scholar Link: https://scholar.google.com/citations?user=tYZ863gAAAAJ&hl=en
Teaching
UG Course: EE104 Fundamentals of Electric Circuits; EE304 Integrated Circuit Design (a.k.a. CMOS VLSI Design); EE317/318/405 Advanced Electronic Science Experiment I, II, III; SME204 Advanced Microelectronic Experiment; EE302/402 Frontier Seminars in Modern Electronic Science and Technology II, IV; EE470 Internship; EE490 Graduation Project; EES203 Innovation and Entrepreneurship.
PG Course: EEE5013/SME5016 Power Management Integrated Circuits Design
Publications Read More
Our group works on the analysis and design of analog, mixed-signal and power management integrated circuits and systems for a variety of applications. Specifically, the research topics include ultra-low-power voltage/current references, low-dropout (LDO) regulators, switched-mode power converters, wireless power transfer integrated circuits, temperature sensors, analog-digital converters, etc. The developed circuits are silicon proved through CMOS technologies. They significantly improve the circuit performances, reduce power consumptions and cost. Up to date, we have published 1 book, >70 SCI/EI papers, and were granted with 8 China and 5 US patents. We also received many Best Paper Awards/Nominations in several international conferences.
Selected works over the past 5 years:
H. Qiao, C. Zhan and Y. Chen, “A -40 ∘C to 140 ∘C picowatt CMOS voltage reference with 0.25-V power supply,” IEEE Trans. Circ. Syst. II: Exp. Briefs, vol. 68, no. 9, pp. 3118-3122, Sept. 2021. https://doi.org/10.1109/TCSII.2021.3088157.
J. Lin, Y. Lu, C. Zhan and R. P. Martins, “A single-stage dual-output regulating rectifier with hysteretic current-wave modulation,” IEEE J. Solid-State Circ., vol. 56, no. 9, pp. 2770-2780, Sept. 2021. https://doi.org/10.1109/JSSC.2021.3071221.
J. Lin, C. Zhan and Y. Lu, “A 6.78-MHz single-stage wireless power receiver with ultra-fast transient response using hysteretic control and multilevel current-wave modulation,” IEEE Trans. Power Elec., vol. 36, no. 9, pp. 9918-9926, Sept. 2021. https://doi.org/10.1109/TPEL.2021.3062400.
G. Cai, Y. Lu, C. Zhan and R. P. Martins, “A fully integrated FVF LDO with enhanced full-spectrum power supply rejection,” IEEE Trans. Power Elec., vol. 36, no. 4, pp. 4326-4337, Apr. 2021. https://doi.org/10.1109/TPEL.2020.3024595.
Q. Huang, C. Zhan, and J. Burm, “A 4-MHz digitally controlled voltage-mode buck converter with embedded transient improvement using delay line control techniques,” IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 67, no. 11, pp. 4029-4040, Nov. 2020. https://doi.org/10.1109/TCSI.2020.3012014.
L. Wang and C. Zhan, “1V relaxation oscillator with integrated voltage and current reference,” IET Elec. Letters, vol. 56, no. 20, pp. 1035-1036, Sept. 2020. https://doi.org/10.1049/el.2020.1855.
G. Cai, C. Zhan and Y. Lu, “A fast-transient-response fully-integrated digital LDO with adaptive current step size control,” IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 66, no. 9, pp. 3610-3619, Sept. 2019. https://doi.org/10.1109/TCSI.2019.2917558.
L. Wang and C. Zhan, “A 0.7-V 28-nW CMOS subthreshold voltage and current reference in one simple circuit,” IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 66, no. 9, pp. 3457-3466, Sept. 2019. https://doi.org/10.1109/TCSI.2019.2927240.
Y. Tan, C. Zhan and G. Wang, “A fully-on-chip analog low-dropout regulator with negative charge pump for low-voltage applications,” IEEE Trans. Circ. Syst. II: Exp. Briefs, vol. 66, no. 8, pp. 1361-1365, Aug. 2019. https://doi.org/10.1109/TCSII.2018.2881072.
C. Zhan, G. Cai and W. H. Ki, “A transient-enhanced output-capacitor-free low-dropout regulator with dynamic miller compensation,” IEEE Trans. On Very Large Scale Integration (VLSI) Systems, vol. 27, no. 1, pp. 243-247, Jan. 2019. https://doi.org/10.1109/TVLSI.2018.2867850.
H. Li, C. Zhan and N. Zhang, “A fully-on-chip digitally assisted LDO regulator with improved regulation and transient responses,” IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 65, no. 11, pp. 4027-4034, Nov. 2018. https://doi.org/10.1109/TCSI.2018.2851514.
Q. Huang, C. Zhan, and J. Burm, “A 30 MHz Voltage-Mode Buck Converter Using Delay-Line-Based PWM Control,” IEEE Trans. Circ. Syst. II: Exp. Briefs, vol. 65, no. 11, pp. 1659-1663, Nov. 2018. https://doi.org/10.1109/TCSII.2017.2764048.
L. Wang, C. Zhan, J. Tang, Y. Liu and G. Li, “A 0.9V 33.7ppm/ºC 85nW sub-bandgap voltage reference consisting of subthreshold MOSFETs and single BJT,” IEEE Trans. On Very Large Scale Integration (VLSI) Systems, vol. 26, no. 10, pp. 2190-2194, Oct. 2018. https://doi.org/10.1109/TVLSI.2018.2836331.
C. Huang, C. Zhan, L. He, L. Wang and Y. Nan, “A 0.6V-minimum-supply, 23.5ppm/ºC subthreshold CMOS voltage reference with 0.45% variation coefficient,” IEEE Trans. Circ. Syst. II: Exp. Briefs, vol. 65, no. 10, pp. 1290-1294, Oct. 2018. https://doi.org/10.1109/TCSII.2018.2846808. (First author UG student, news reported by SUSTech EEE homepage & WeChat. 本科生一作，南科大电子系官网、微信公众号报道: https://mp.weixin.qq.com/s/27-wxtfW24bW3GaAFteWlQ)
Y. Liu, C. Zhan, L. Wang, J. Tang and G. Wang, “A 0.4-V wide temperature range all-MOSFET subthreshold voltage reference with 0.027%/V line sensitivity,” IEEE Trans. Circ. Syst. II: Exp. Briefs, vol. 65, no. 8, pp. 969-973, Aug. 2018. https://doi.org/10.1109/TCSII.2018.2794512.
Y. Liu, C. Zhan and L. Wang, “An ultralow power subthreshold CMOS voltage reference without requiring resistors or BJTs,” IEEE Trans. Very Large Scale Integration (VLSI) Systems, vol. 26, no. 1, pp. 201-205, Jan. 2018. https://doi.org/10.1109/TVLSI.2017.2754442.
Lab members Read More
Join us
Visiting scholars and exchange students are also warmly welcome.
If interested, please send your resume to zhancc@sustech.edu.cn.
Contact Us
Contact Address
Southern University of Science and Technology (SUSTech), No. 1088 Xueyuan Blvd., Shenzhen, China 518055
Office Phone
(86)755-8801-5480
zhancc@sustech.edu.cn