林龙扬

助理教授 深港微电子学院

林龙扬博士,于2018年获得新加坡国立大学博士学位,2018-2021年于新加坡国立大学任博士后研究员,2021年5月加入南方科技大学深港微电子学院。林龙扬博士长期在集成电路设计领域从事前沿研究,研究方向包括低功耗及高能效集成电路设计、自适应数字电路设计、多传感器融合芯片设计、集成电路硬件安全、超低温集成电路设计等;在先进CMOS工艺成功流片超过10次;累计发表论文 30 余篇,包括集成电路领域顶级期刊 IEEE Journal of Solid-State Circuits 论文 8 篇、芯片奥林匹克 ISSCC 5 篇、顶级会议 Symposium on VLSI Circuits 7篇;出版英文专著 1 本;专利申请 6 项;担任国际期刊 IEEE TVLSI 及 IET JoE 的副编辑;研究成果曾被40多家国际杂志媒体报道。

 

招聘信息

林龙扬博士课题组常年招聘博士后、科研助理,招收博士生、硕士生、本科实习生,有意应聘者请将简历(格式PDF)发送至以下邮箱,以“招聘岗位_应聘者姓名”为题。

联系方式:linly@sustech.edu.cn

个人简介

研究领域

超低功耗数字集成电路设计

高能效人工智能处理器设计

多传感器融合芯片设计

集成电路硬件安全

无电池边缘计算处理器

超低温电路设计


教学

SME309 微型处理器设计 (秋)

SME5020 超低功耗数字电路设计(春)


学术成果 查看更多

Books

  • S. Jain, L. Lin, M. Alioto, Adaptive Digital Circuits for Power-Performance Range beyond Wide Voltage Scaling – From the Clock Path to the Data Path, Springer, 2020, doi: 10.1007/978-3-030-38796-9, eBook ISBN 978-3-030-38796-9, Hardcover ISBN 978-3-030-38795-2.

International Journals

  • W. Mao, K. Li, Q. Cheng, L. Dai, B. Li, X. Xie, H. Li, L. Lin, H. Yu, “A Configurable Floating-Point Multiple-Precision Processing Element for HPC and AI Converged Computing,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 30, no. 2, pp. 213-226, Feb. 2022, doi: 10.1109/TVLSI.2021.3128435.
  • S. Jain, L. Lin# and M. Alioto, “±CIM SRAM for Signed In-Memory Broad-Purpose Computing From DSP to Neural Processing,” IEEE Journal of Solid-State Circuits (JSSC), vol. 56, no. 10, pp. 2981-2992, Oct. 2021, doi: 10.1109/JSSC.2021.3092759. (#corresponding author)
  • L. Fassio, L. Lin, R. De Rose, M. Lanuzza, F. Crupi and M. Alioto, “A 0.6-to-1.8V CMOS Current Reference with Near-100% Power Utilization,” IEEE Transactions on Circuits and Systems II: Express Briefs, early access, doi: 10.1109/TCSII.2021.3085607.
  • L. Fassio*, L. Lin*, R. De Rose, M. Lanuzza, F. Crupi and M. Alioto, “Trimming-Less Voltage Reference for Highly Uncertain Harvesting Down to 0.25 V, 5.4 pW,” IEEE Journal of Solid-State Circuits (JSSC), vol. 56, no. 10, pp. 3134-3144, Oct. 2021, doi: 10.1109/JSSC.2021.3081440. (*equally credited authors)
  • L. Lin, S. Jain, M. Alioto, “Sub-nW Microcontroller with Dual-mode Standard Cells and Self-startup for Battery-Indifferent Sensor Nodes”, IEEE Journal of Solid-State Circuits (JSSC), vol. 56, no. 5, pp. 1618-1629, May 2021, doi: 10.1109/JSSC.2020.3038115.
  • L. Fassio, F. Settino, L. Linet al., “A Robust, High-Speed and Energy-Efficient Ultralow-Voltage Level Shifter,” in IEEE Transactions on Circuits and Systems II: Express Briefsearly access, doi: 10.1109/TCSII.2020.3033253.
  • S. Jain, L. Lin, M. Alioto, “Broad-Purpose In-Memory Computing for Signal Monitoring and Machine Learning Workloads,” in IEEE Solid-State Circuits Lettersvol. 3, pp. 394-397, 2020, doi: 10.1109/LSSC.2020.3024838.
  • S. Jain, L. Lin#, M. Alioto, “Drop-In Energy-Performance Range Extension in Microcontrollers Beyond VDD Scaling”, in IEEE Journal of Solid-State Circuits (JSSC), vol. 55, no. 10, pp. 2670-2679, Oct. 2020, doi: 10.1109/JSSC.2020.3005778. (#corresponding author)
  • L. Lin, S. Jain, M. Alioto, “Integrated Power Management for Battery-Indifferent Systems with Ultra-Wide Adaptation down to nW”, in IEEE Journal of Solid-State Circuits (JSSC), vol. 55, no. 4, pp. 967-976, April 2020, doi: 10.1109/JSSC.2019.2959742.
  • S. JainL. Lin, M. Alioto, “Automated Design of Reconfigurable Micro-Architectures for Accelerators under Wide Voltage Scaling”, in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 3, pp. 777-790, March 2020, doi: 10.1109/TVLSI.2019.2950959.
  • L. Lin, S. Jain, M. Alioto, “Reconfigurable Clock Networks for Wide Voltage Scaling,” in IEEE Journal of Solid-State Circuits (JSSC), vol. 54, no. 9, pp. 2622-2631, Sept. 2019, doi: 10.1109/JSSC.2019.2925269.
  • O. Aiello, P. Crovetti, L. Lin, M. Alioto, “A pW-Power Hz-Range Oscillator Operating with a 0.3V-1.8V Unregulated Supply”, in IEEE Journal of Solid-State Circuits (JSSC), vol. 54, no. 5, pp. 1487-1496, May 2019, doi: 10.1109/JSSC.2018.2886336.
  • S. Jain, L. Lin, M. Alioto, “Dynamically Adaptable Pipeline for Energy-Efficient Microarchitectures under Wide Voltage Scaling,” in IEEE Journal of Solid-State Circuits (JSSC), vol. 53, no. 2, pp. 632-641, Feb. 2018, doi: 10.1109/JSSC.2017.2768406.
  • S. Jain, L. Lin, M. Alioto, “Design-Oriented Energy Models for Wide Voltage Scaling down to the Minimum Energy Point,” in IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 64, no. 12, pp. 3115-3125, Dec. 2017, doi: 10.1109/TCSI.2017.2736540.

International Conferences

  • Q. Fang*, L. Lin*, Y. Z. Wong, H. Zhang, M. Alioto, “Side-Channel Attack Counteraction via Machine Learning-Targeted Power Compensation for Post-Silicon HW Security Patching”, 2022 IEEE International Solid-State Circuits Conference (ISSCC) , Feb. 2022. (*equally credited authors)
  • L. Wu, J. Guo, R. Jiang, Y. Peng, H. Wu, J. Li, Y. Dong, M. Zhang, Z. Li, K. A. Ng, C.-W. Tsai, L. Zhang, L. Lin, L. Lin and J. Yoo, “BatDrone: A 9.83M-focal points/s, 7.76μs Latency Ultrasound Imaging Sensor SoC with On-Chip Per-Voxel RX Beam-Focusing for 7-m Range Drone Applications”, 2022 IEEE International Solid-State Circuits Conference (ISSCC) , Feb. 2022.
  • T. He, Z. Kong, X. Liang, J. Luo, L. Lin, L. Qi, Y. Li, J. Zhao, G. Wang, “A 10-Mbps 119.2-pJ/bit Software Defined Body Channel Transceiver Employing a CCII-based PGA and a 2.5-bit/cycle ADC in 180-nm CMOS,” 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), 2021, pp. 206-207, doi: 10.1109/ICTA53157.2021.9661912.
  • L. Fassio*, L. Lin*, R. De Rose, M. Lanuzza, F. Crupi and M. Alioto, “A 3.2-pW, 0.2-V Trimming-Less Voltage Reference with 1.4-mV Across-Wafer Total Accuracy,” ESSCIRC 2021 – IEEE 47th European Solid State Circuits Conference (ESSCIRC), 2021, pp. 343-346, doi: 10.1109/ESSCIRC53450.2021.9567778. (*equally credited authors)
  • Y. Dong, J. Li, L. Lin, T. Tang, J. H. Park, K. A. Ng, M. Zhang, L. Zhang, J. S. Y. Tan, J. Yoo., “Body-Coupled Power Transceiver with Node-Specific Body-Area Powering,” ESSCIRC 2021 – IEEE 47th European Solid State Circuits Conference (ESSCIRC), 2021, pp. 423-426, doi: 10.1109/ESSCIRC53450.2021.9567745.
  • L. Lin, K. A. Ahmed, P. S. Salamani and M. Alioto, “Battery-Less IoT Sensor Node with PLL-Less WiFi Backscattering Communications in a 2.5-μW Peak Power Envelope,” 2021 Symposium on VLSI Circuits, 2021, pp. 1-2, doi: 10.23919/VLSICircuits52068.2021.9492358.
  • M. Zhang, L. Zhang, J. H. Park, C-W. Tsai, K. A. Ng, L. Lin, Y. Dong, J. Li, T. Tang, H. Wu, L. Wu, J. Yoo, “A One-Shot Learning, Online-Tuning, Closed-Loop Epilepsy Management SoC with 0.97μJ/Classification and 97.8% Vector-Based Sensitivity,” 2021 Symposium on VLSI Circuits, 2021, pp. 1-2, doi: 10.23919/VLSICircuits52068.2021.9492429.
  • L. Lin, S. Jain, M. Alioto, “Multi-Sensor Platform with Five-Order-of-Magnitude System Power Adaptation down to 3.1nW and Sustained Operation under Moonlight Harvesting”, 2020 Symposium on VLSI Circuit, Honolulu, HI, USA, 2020, pp. 1-2, doi: 10.1109/VLSICircuits18222.2020.9162898.
  • L. Fassio*, L. Lin*, R. Rose, M. Lanuzza, F. Crupi, M. Alioto, “A 0.25-V, 5.3-pW Voltage Reference with 25-µV/oC Temperature Coefficient, 140µV/V Line Sensitivity and 2,200-µm2 Area in 180nm”, 2020 Symposium on VLSI Circuit, Honolulu, HI, USA, 2020, pp. 1-2, doi: 10.1109/VLSICircuits18222.2020.9162872. (*equally credited authors)
  • J. Li, Y. Dong, J. Park, L. Lin, T. Tang, M. Zhang, H. Wu, L. Zhang, J. S. Y. Tan, J. Yoo “Human-Body-Coupled Power-Delivery and Ambient-Energy-Harvesting ICs for a Full-Body-Area Power Sustainability”, 2020 IEEE International Solid- State Circuits Conference – (ISSCC), San Francisco, CA, USA, 2020, pp. 514-516, doi: 10.1109/ISSCC19947.2020.9063042.
  • S. Jain, L. Lin, M. Alioto, “Drop-In Energy-Performance Range Extension in Microcontrollers Beyond VDD Scaling”, 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC), Macau, China, 2019, pp. 125-128, doi: 10.1109/A-SSCC47793.2019.9056919.
  • L. Lin, S. Jain, M. Alioto, “Integrated Power Management and Microcontroller for Ultra-Wide Power Adaptation down to nW”2019 Symposium on VLSI Circuit, Kyoto, Japan, 2019, pp. C178-C179, doi: 10.23919/VLSIC.2019.8778085.
  • L. Lin, S. Jain, M. Alioto, “A 595pW 14pJ/cycle Microcontroller with Dual-mode Standard Cells and Self-startup for Battery-Indifferent Distributed Sensing”, 2018 IEEE International Solid- State Circuits Conference – (ISSCC), San Francisco, CA, 2018, pp. 44-46, doi: 10.1109/ISSCC.2018.8310175.
  • L. Lin, K. Trinh Quang, M. Alioto, “Transistor Sizing Strategy for Simultaneous Energy-Delay Optimization in CMOS Buffers”, 2017 IEEE International Symposium on Circuits and Systems (ISCAS), Baltimore, MD, 2017, pp. 1-4, doi: 10.1109/ISCAS.2017.8050997.
  • L. Lin, S. Jain, M. Alioto, “Reconfigurable Clock Networks for Random Skew Mitigation from Sub-Threshold to Nominal Voltage”, 2017 IEEE International Solid- State Circuits Conference – (ISSCC), San Francisco, CA, 2017, pp. 440-441, doi: 10.1109/ISSCC.2017.7870450.

Patents                                                          

  • L. Lin, S. Jain, M. Alioto, “Multi-mode standard cell logic and self-startup for battery-indifferent or pure energy harvesting systems”, pending U.S. Patent 2020/0395940 A1, Dec. 17, 2020.

新闻动态 更多新闻

  • 积累沉淀,化解万难 | 专访深港微电子学院林龙扬助理教授

    2022-05-08
  • 科研聚焦 | 深港微电子学院林龙扬课题组在集成电路设计最高级别会议ISSCC发表最新研究成果

    2022-05-08

团队成员 查看更多

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南方科技大学深港微电子学院林龙扬老师现有2022级申请-考核制博士生名额(第二批次),欢迎感兴趣的同学尽快前来联系。请将个人简历等相关材料发送至:linly@sustech.edu.cn。课题组详细信息可参考:(个人主页https://faculty.sustech.edu.cn/linly/

 

导师简介:

林龙扬博士,于2018年获得新加坡国立大学博士学位,2018-2021年于新加坡国立大学任博士后研究员,2021年5月加入南方科技大学深港微电子学院,现为课题组独立PI,获深圳市海外高层次人才计划支持。林龙扬博士的研究方向包括低功耗集成电路设计、自适应数字电路设计、集成电路硬件安全等;累计发表论文30余篇,包括集成电路领域顶级期刊 IEEE Journal of Solid-State Circuits论文8篇(6篇一作/通讯),“芯片奥林匹克”ISSCC会议5篇(3篇一作/通讯),Symposium on VLSI Circuits 7 篇(6篇一作/通讯);出版英文专著1本;专利申请6项;获得 2020 年ISSCC最佳演示奖,2017年 ISSCC STGA等奖项;担任 IEEE Transactions on VLSI Systems及 IET The Journal of Engineering的副编辑;研究成果曾被40余家国际科技媒体报道。

 

课题组简介:

本课题组致力于研究超低功耗集成电路设计、高能效人工智能处理器设计、多传感器融合芯片设计、超低温CMOS电路设计,集成电路硬件安全等领域。课题组目前经费充足,可以保证每年至少3次的先进工艺节点流片(22/28/40/65/180nm等)。本课题组导师对科研具有极高的热情,认真负责,会花费大量时间亲自提供及时、认真的指导工作,保证学生在课题组期间能够获得长足的进步和收获。同时本课题组导师性格随和,会与课题组同学平等相处、建立良好的关系,对在课题组期间表现优异者愿意积极为其推荐工作或是继续深造的机会。

 

招生要求:

1)符合南方科技大学申请考核制博士生招生要求(请参考https://gs.sustech.edu.cn/#/admission/detail?current_child_id=86&id=96&article_id=2710);

2)具有坚定的学术理想,强大的学习能力和端正的学习态度;

3)对集成电路设计相关研究有浓厚兴趣,为人认真负责,有独立思考能力;

4)具有优秀的英语文献阅读能力,英语论文写作能力。

 

博士研究生待遇:

博士年限为4-5年;博士期间将有每月高额生活补助+课题组科研补助+会议出差补助(总额远超国内其他高校);学校提供单人宿舍。

 

联系方式

邮箱:linly@sustech.edu.cn

地址:深圳市南山区桃源街道 南山智园 崇文园区3号楼812

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