Publications

  • Journal Papers
  • Invention Patent
  • Authored Books

Journal Papers

[J29] G. Cai, Y. Lu, C. Zhan and R. P. Martins, "A fully integrated FVF LDO with enhanced full-spectrum power supply rejection," IEEE Trans. Power Elec., 2021, to appear. https://doi.org/10.1109/TPEL.2020.3024595.
[J28] Q. Huang, C. Zhan, and J. Burm, "A 4-MHz digitally controlled voltage-mode buck converter with embedded transient improvement using delay line control techniques," IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 67, no. 11, pp. 4029-4040, Nov. 2020. https://doi.org/10.1109/TCSI.2020.3012014.
[J27]

L. Wang and C. Zhan, “1V relaxation oscillator with integrated voltage and current reference,” IET Elec. Letters, vol. 56, no. 20, pp. 1035-1036, Sept. 2020. https://doi.org/10.1049/el.2020.1855.

[J26]

Q. Huang, C. Zhan, L. Wang, Z. Li and Q. Pan, "A -40 oC to 120 oC, 169 ppm/oC nano-Ampere CMOS current reference," IEEE Trans. Circ. Syst. II: Exp. Briefs, vol. 67, no. 9, pp. 1494-1498, Sept. 2020. https://doi.org/10.1109/TCSII.2020.3009838.

[J25]

J. Lin, L.  Wang, Y. Lu and C. Zhan, "A nano-watt dual-output subthreshold CMOS voltage reference," IEEE Open J. Circ. Syst., vol. 1, pp. 100-106, Aug. 2020. https://doi.org/10.1109/OJCAS.2020.3005546.

[J24]

J. Liang, S. Yi, W. Bai, L. Wang, C. Zhan, C. Liao, H. M. Lam, M. Zhang, S. Zhang, and H. Jiao, "A -80 dB PSRR 4.99 ppm/oC TC bandgap reference with nonlinear compensation," Microelectronics Journal, vol. 95, Jan. 2020. https://doi.org/10.1016/j.mejo.2019.104664.

[J23]

J. Lin, L. Wang, C. Zhan and Y. Lu, "A 1-nW Ultra-Low Voltage High PSRR Subthreshold CMOS Voltage Reference with 0.0154%/V Line Sensitivity," IEEE Trans. Circ. Syst. II: Exp. Briefs, vol. 66, no.10, pp. 1653-1657, Oct. 2019. https://doi.org/10.1109/TCSII.2019.2920693.

[J22]

G. Cai, C. Zhan and Y. Lu, “A fast-transient-response fully-integrated digital LDO with adaptive current step size control,” IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 66, no. 9, pp. 3610-3619, Sept. 2019. https://doi.org/10.1109/TCSI.2019.2917558.

[J21]

L. Wang and C. Zhan, “A 0.7-V 28-nW CMOS subthreshold voltage and current reference in one simple circuit,” IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 66, no. 9, pp. 3457-3466, Sept. 2019. https://doi.org/10.1109/TCSI.2019.2927240.

[J20]

Y. Tan, C. Zhan and G. Wang, "A fully-on-chip analog low-dropout regulator with negative charge pump for low-voltage applications," IEEE Trans. Circ. Syst. II: Exp. Briefs, vol. 66, no. 8, pp. 1361-1365, Aug. 2019. https://doi.org/10.1109/TCSII.2018.2881072.

[J19]

C. Zhan, G. Cai and W. H. Ki, “A transient-enhanced output-capacitor-free low-dropout regulator with dynamic miller compensation,” IEEE Trans. On Very Large Scale Integration (VLSI) Systems, vol. 27, no. 1, pp. 243-247, Jan. 2019. https://doi.org/10.1109/TVLSI.2018.2867850.

[J18]

H. Li, C. Zhan and N. Zhang, "A fully-on-chip digitally assisted LDO regulator with improved regulation and transient responses," IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 65, no. 11, pp. 4027-4034, Nov. 2018. https://doi.org/10.1109/TCSI.2018.2851514.

[J17]

Q. Huang, C. Zhan, and J. Burm, “A 30 MHz Voltage-Mode Buck Converter Using Delay-Line-Based PWM Control,” IEEE Trans. Circ. Syst. II: Exp. Briefs, vol. 65, no. 11, pp. 1659-1663, Nov. 2018. https://doi.org/10.1109/TCSII.2017.2764048.

[J16]

L. Wang, C. Zhan, J. Tang, Y. Liu and G. Li, “A 0.9V 33.7ppm/ºC 85nW sub-bandgap voltage reference consisting of subthreshold MOSFETs and single BJT,” IEEE Trans. On Very Large Scale Integration (VLSI) Systems, vol. 26, no. 10, pp. 2190-2194, Oct. 2018. https://doi.org/10.1109/TVLSI.2018.2836331.

[J15]

C. Huang, C. Zhan, L. He, L. Wang and Y. Nan, "A 0.6V-minimum-supply, 23.5ppm/ºC subthreshold CMOS voltage reference with 0.45% variation coefficient," IEEE Trans. Circ. Syst. II: Exp. Briefs, vol. 65, no. 10, pp. 1290-1294, Oct. 2018. https://doi.org/10.1109/TCSII.2018.2846808(First author UG student, news reported by SUSTech EEE homepage & WeChat. 本科生一作,南科大电子系官网、微信公众号报道https://mp.weixin.qq.com/s/27-wxtfW24bW3GaAFteWlQ)

[J14]

Y. Liu, C. Zhan, L. Wang, J. Tang and G. Wang, “A 0.4-V wide temperature range all-MOSFET subthreshold voltage reference with 0.027%/V line sensitivity,” IEEE Trans. Circ. Syst. II: Exp. Briefs, vol. 65, no. 8, pp. 969-973, Aug. 2018. https://doi.org/10.1109/TCSII.2018.2794512.

[J13]

L. Wang, C. Zhan, J. Tang and G. Li, “An amplifier-offset-insensitive and high PSRR subthreshold CMOS voltage reference.” Int’l J. Circ. Theor. Appl., vol. 46, no. 2, pp. 259-271, Feb. 2018. https://doi.org/10.1002/cta.2383.

[J12]

S. Zhao, C. Zhan and G. Cai, “A 2×VDD-enabled output-capacitor-free low-dropout regulator with fast transient response for low-cost system-on-chip,” J. Circ. Syst. Comp., vol. 27, no.9, pp. 1850143-1-17, Jan. 2018. https://doi.org/10.1142/S0218126618501438.

[J11]

Y. Liu, C. Zhan and L. Wang, “An ultralow power subthreshold CMOS voltage reference without requiring resistors or BJTs,” IEEE Trans. Very Large Scale Integration (VLSI) Systems, vol. 26, no. 1, pp. 201-205, Jan. 2018. https://doi.org/10.1109/TVLSI.2017.2754442.

[J10]

Q. Huang, C. Zhan and J. Burm, “A low-complexity locking-accelerated digital PLL with multi-output bang-bang phase detector,” Microelectronics Journal, vol. 67, pp. 19-24, Sept. 2017. https://doi.org/10.1016/j.mejo.2017.07.004.

[J09]

L. Wang, C. Zhan, J. Tang, S. Zhao, G. Cai, Y. Liu, Q. Huang and G. Li, “Analysis and design of a current-mode bandgap reference with high power supply ripple rejection,” Microelectronics Journal, vol. 68, pp. 7-13, Aug. 2017. https://doi.org/10.1016/j.mejo.2017.08.011.

[J08]

Q. Huang, H. Joo, J. Kim, C. Zhan and J. Burm, “An energy-efficient frequency domain CMOS temperature sensor with switched Vernier time-to-digital conversion,” IEEE Sensors Journal, vol. 17, no. 10, pp. 3001-3011, May 2017. https://doi.org/10.1109/JSEN.2017.2686442.

On/Before 2014:

[J07]

C. Zhan and W. H. Ki, “Analysis and design of output-capacitor-free low-dropout regulators with low quiescent current and high power supply rejection,” IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 61, no. 2, pp. 625-636, Feb. 2014 (Top 5 most frequently downloaded paper in Feb. 2014). https://doi.org/10.1109/TCSI.2014.2300847.

[J06]

C. Zhan and W. H. Ki, “An output-capacitor-free adaptively biased low-dropout regulator with subthreshold undershoot-reduction for SoC,” IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 59, no. 5, pp. 1119-1131, May 2012 (Invited to Special Issue on ISCAS 2011).  https://doi.org/10.1109/TCSI.2012.2190675.

[J05]

W. H. Ki, K. M. Lai and C. Zhan, “Charge balance analysis and state transition analysis of hysteretic voltage mode switching converters,” IEEE Tran. Circ. Syst. I: Reg. Papersvol. 58, no.5, pp. 1142-1153, May 2011. https://doi.org/10.1109/TCSI.2010.2089557.

[J04]

C. Zhan and W. H. Ki, “A Low dropout regulator with low quiescent current and high power supply rejection over wide range of frequency for SoC,” J. Circ. Syst. Comp.vol. 20, no. 1, pp. 1-13, Jan. 2011 (Invited to Special Issue on Green Integrated Circuits).

[J03]

C. Zhan and W. H. Ki, “Output-capacitor-free adaptively biased low-dropout regulator for system-on-chips,” IEEE Tran. Circ. Syst. I: Reg. Papers, vol. 57, no. 5, pp. 1017-1028, May 2010 (Invited to Special Issue on ISCAS 2009). https://doi.org/10.1109/TCSI.2010.2046204.

[J02]

C. Zhan, X. Zhou, and D. Zhou, “A low-power high-resolution sigma-delta modulator,” Research & Progress of Solid-State Electronics, vol. 27, no. 3, pp. 375-379, Aug. 2007. https://doi.org/10.3969/j.issn.1000-3819.2007.03.021

[J01]

C. Zhan, Y. Wang, X. Zhou, H. Min and D. Zhou, “A deep-submicron sigma-delta ADC design flow,” Research & Progress of Solid-State Electronics, vol. 27, no. 1, pp. 63-68, Feb. 2007https://doi.org/10.3969/j.issn.1000-3819.2007.01.014

 

Conference Papers

[C39]

X. Liu, C. Zhan and H. Qiao, "Chip-area-efficient capacitor-less LDO regulator with fast-transient response," IEEE Int’l Conf. Integrated Circ. Tech. App., pp. 27-28, Nov. 2019.

[C38]

G. Cai, C. Zhan and Y. Lu, “A fast-transient-response fully-integrated digital LDO with adaptive current step size control,” IEEE Int’l Symp. Circ. Syst., pp. 1-4, May 2019. https://doi.org/10.1109/ISCAS.2019.8702758.

[C37]

H. Qiao, C. Zhan, J. Yi and L. Wang, “A Low-Power CMOS Voltage Reference with Current Loading Capability,” IEEE Int’l Conf. Integrated Circ. Tech. App., pp. 51-52, Nov. 2018 (Nominated for Best Paper Award). https://doi.org/10.1109/CICTA.2018.8705723.

[C36]

G. Wang, C. Zhan, J. Tang and N. Zhang, “Dynamic-replica-based all-condition-stable LDO regulator with 5X improved load regulation,” IEEE Int’l Conf. Integrated Circ. Tech. App., invited, pp. 49-50, Nov. 2018. https://doi.org/10.1109/CICTA.2018.8706070.

[C35]

Y. Lei, C. Zhan, C. Huang and L. Wang, “A Chip-Area-Efficient Subthreshold CMOS Voltage Reference with High PSRR Based on Compensated DVGS of NMOS Transistors,” IEEE Asia Pacific Conf. Circ. Syst., pp. 497-500, Oct. 2018. https://doi.org/10.1109/APCCAS.2018.8605633.

[C34]

J. Tang, C. Zhan, G. Wang, and Y. Liu, "A 0.7V fully-on-chip pseudo-digital LDO regulator with 6.3mA quiescent current and 100mV dropout voltage in 0.18-mm CMOS," IEEE European Solid-State Circ. Conf., pp. 206-209, Sept. 2018. https://doi.org/10.1109/ESSCIRC.2018.8494307. (First author UG student, news reported by SUSTech EEE homepage & WeChat. 本科生一作,南科大电子系官网、微信公众号报道: https://mp.weixin.qq.com/s/AbjisU2Yt57lP8Maz943wQ)

[C33]

H. Li, C. Zhan and N. Zhang, "Fully-on-chip digitally assisted LDO regulator with improved regulation and transient responses," IEEE Int'l Symp. VLSI, pp. 160-163, Jul. 2018. https://doi.org/10.1109/ISVLSI.2018.00038.

[C32]

Y. Nan, C. Zhan, G. Wang, L. He and H. Li, "Replica-based low drop-out voltage regulator with assistant power transistors for digital VLSI systems," IEEE Int'l Symp. VLSI, pp. 6-9, Jul. 2018. https://doi.org/10.1109/ISVLSI.2018.00012.

[C31]

N. Zhang, C. Zhan and H. Li, "A wide-load-range mixed-mode LDO regulator with single-transistor-assisted buffer," IEEE NEWCAS Conf., pp. 162-165, Jun. 2018. https://doi.org/10.1109/NEWCAS.2018.8585690.

[C30]

L. He, C. Zhan, Y. Nan, L. Wang and G. Li, “A 0.5V 46.2ppm/°C CMOS voltage reference based on compensated DVth with wide temperature range and high PSRR,” IEEE NEWCAS Conf., pp. 66-69, Jun. 2018. https://doi.org/10.1109/NEWCAS.2018.8585544.

[C29]

Y. Tan, C. Zhan and G. Wang, "A fully-on-chip low-voltage low-dropout regulator with negative charge pump," IEEE Int'l Conf. Elec. Devices Solid-State Circ., pp. 1-2, Jun. 2018 (Best Paper Award). https://doi.org/10.1109/EDSSC.2018.8487086. (First author UG student, news reported by SUSTech EEE homepage & WeChat. 本科生一作,南科大电子系官网、微信公众号报道: https://mp.weixin.qq.com/s/-5oeVBJ601w37zpdOIJTVw)

[C28]

G. Ma, C. Zhan and Y. Zhang, "A transient-improved dynamic-replica LDO regulator with bulk modulation," IEEE Int'l Conf. Elec. Devices Solid-State Circ., pp. 1-2, Jun. 2018. https://doi.org/10.1109/EDSSC.2018.8487161.

[C27]

F. Mao, Y. Lu, J. Lin, C. Zhan, S. P. U and R. P. Martins, “A single-stage current-mode active rectifier with accurate output-current regulation for IoT,” IEEE Int’l Symp. Circ. Syst., invited, pp. 1-4, May 2018. https://doi.org/10.1109/ISCAS.2018.8351692.

[C26]

L. Wang, C. Zhan, L. He, J. Tang, G. Wang, Y. Liu  and G. Li, “A low-power high-PSRR CMOS voltage reference with active-feedback frequency compensation for IoT Applications,” IEEE Int’l Symp. Circ. Syst., invited, pp. 1-4, May 2018. https://doi.org/10.1109/ISCAS.2018.8351808.

[C25]

J. Tang, C. Zhan and L. Wang, “A power and area efficient CMOS voltage reference with second-order curvature compensation,” IEEE Biomedical Circ. Syst. Conf. (BioCAS), pp. 1-3, Oct. 2017. https://doi.org/10.1109/BIOCAS.2017.8325068.

[C24]

S. Zhao, C. Zhan and G. Cai, “A 2×VDD-enabled fully-integrated low-dropout regulator with fast transient response,” IEEE Int'l Conf. Very Large Scale Integ. (VLSI-SoC), pp. 1-4, Oct. 2017. https://doi.org/10.1109/VLSI-SoC.2017.8203475.

[C23]

W. H. Ki, L. Cheng and C. Zhan, "Closed-loop transfer functions and frequency-point spectrum simulation of CCM buck converters," IEEE Asia Pacific Conf. Circ. Syst., pp. 698-701, Oct. 2016. https://doi.org/10.1109/APCCAS.2016.7804069.

[C22]

Q. Huang, C. Zhan and J. Burm, “A low-complexity fast-locking digital PLL with multi-output bang-bang phase detector,” IEEE Asia Pacific Conf. Circ. Syst., pp. 418-420, Oct. 2016. https://doi.org/10.1109/APCCAS.2016.7803991.

[C21]

Y. Liu, C. Zhan and L. Wang, “An ultra-low power CMOS subthreshold voltage reference without requiring resistors or BJTs,” IEEE Asia Pacific Conf. Circ. Syst., pp. 688-690, Oct. 2016. https://doi.org/10.1109/APCCAS.2016.7804066.

[C20]

L. Wang, C. Zhan and G. Li, “An ultra-low power and offset-insensitive CMOS subthreshold voltage reference,” IEEE Asia Pacific Conf. Circ. Syst., pp. 243-246, Oct. 2016. https://doi.org/10.1109/APCCAS.2016.7803944.

[C19]

L. Wang, C. Zhan, S. Zhao, G. Cai, Y. Liu, Q. Huang and G. Li, “Design of high-PSRR current-mode bandgap reference with improved frequency compensation,” IEEE Int’l. Conf. Elec. Devices & Solid-State Circ., pp. 448-451, Aug. 2016. https://doi.org/10.1109/EDSSC.2016.7785295.

[C18]

C. Zhan, W. H. Ki, J. Zheng, and Y. Liu, “A 0.035mm2 150mA fast-response low-dropout regulator based on matching-enhanced error amplifier and multi-threshold-controlled unity-gain buffer in 0.13-µm CMOS,” IEEE Int’l Symp. Circ. Syst., pp. 2703-2706, May 2016. https://doi.org/10.1109/ISCAS.2016.7539151.

On/Before 2014:

[C17]

Y. Liu, C. Zhan, J. Zheng and W. H. Ki, “Load-transient enhanced low-dropout regulator based on a buffer stage with paralleled current and voltage paths for low-ESR applications,” IEEE Int’l. Conf. Elec. Devices & Solid-State Circ., pp. 1-2, Jun. 2014. https://doi.org/10.1109/EDSSC.2014.7061245.

[C16]

M. Tan, C. Zhan and W. H. Ki, “A 4µA quiescent current output-capacitor-free low-dropout regulator with fully differential input stage,” IEEE Int’l. Symp. Circ. Syst., pp. 2457-2460, Jun. 2014. https://doi.org/10.1109/ISCAS.2014.6865670.

[C15]

Y. Liu, C. Zhan and W. H. Ki, “Fast-transient-response high-PSR low-dropout regulator based on ultra-fast error amplifier and unity-gain buffer for portable applications,” IEEE Int’l. Symp. Circ. Syst., pp. 906-909, Jun. 2014. https://doi.org/10.1109/ISCAS.2014.6865283.

[C14]

Y. Liu, C. Zhan, T. S. Yim and W. H. Ki, “Continuous-time common-mode feedback detection circuits with enhanced detection accuracy,” IEEE Int’l. Conf. Elec. Devices & Solid-State Circ., pp. 1-4, Dec. 2012. https://doi.org/10.1109/EDSSC.2012.6482773.

[C13]

K. M. Lai, C. Zhan and W. H. Ki, “A comparative study of hysteretic voltage-mode buck converters for high switching frequency and high accuracy,” IEEE Asia Pacific Conf. Circ. Syst., pp. 57-60, Dec. 2012. https://doi.org/10.1109/APCCAS.2012.6418970.

[C12]

Y. Liu, C. Zhan, L. Cheng and W. H. Ki, “A 10/30MHz PWM buck converter with an accuracy-improved ramp generator,” IEEE Asia Pacific Conf. Circ. Syst., pp. 420-423, Dec. 2012. https://doi.org/10.1109/APCCAS.2012.6419061.

[C11]

Y. Liu, C. Zhan, L. Cheng and W. H. Ki, “A chip-area-efficient CMOS low-dropout regulator using wide-swing voltage buffer with parabolic adaptive biasing for portable applications,” IEEE Asian Solid-State Circ. Conf., pp. 233-236, Nov. 2012. https://doi.org/10.1109/IPEC.2012.6522668.

[C10]

Y. Liu, C. Zhan and W. H. Ki, “A fast-transient-response hybrid buck converter with automatic and nearly-seamless loop transition for portable applications,” IEEE European Solid-State Circ. Conf., pp. 165-168, Sept. 2012. https://doi.org/10.1109/ESSCIRC.2012.6341274.

[C09]

C. Zhan and W. H. Ki, “An output-capacitor-free adaptively biased low-dropout regulator with sub-threshold undershoot-reduction for SoC,” IEEE Int’l Symp. Circ. Syst., pp. 45-48, May 2011 (Best Student Paper Award, First Prize). https://doi.org/10.1109/ISCAS.2011.5937497.

[C08]

C. Zhan and W. H. Ki, “An adaptively biased low-dropout regulator with transient enhancement,” IEEE Asia & South Pacific Design Auto. Conf., pp. 117-118, Jan. 2011. https://doi.org/10.1109/ASPDAC.2011.5722166.

[C07]

C. Zhan and W. H. Ki, “Output-capacitor-free adaptively biased low-dropout regulators,” IEEE Int’l. Conf. Elec. Devices & Solid-State Circ., pp. 63-66, Dec. 2010 (Best Student Paper Award, Third Prize). https://doi.org/10.1109/EDSSC.2010.5713774.

[C06]

C. Zhan and W. H. Ki, “An output-capacitor-free cascode low-dropout regulator for SoC with low quiescent current and high power supply rejection,” IEEE Asia Pacific Conf. Circ. Syst., pp. 472-475, Dec. 2010. https://doi.org/10.1109/APCCAS.2010.5775048.

[C05]

C. Zhan and W. H. Ki, “A low-dropout regulator for SoC with high power supply rejection and low quiescent current,” IEEE Int’l Symp. Int. Circ., pp. 37-40, Dec. 2009 (Best Paper Award). https://ieeexplore.ieee.org/document/5403907.

[C04]

C. Zhan and W. H. Ki, “Loop bandwidth extension technique for PWM voltage mode DC-DC switching converters,” IEEE Asian Solid-State Circ. Conf., pp. 325-328, Nov. 2009. https://doi.org/10.1109/ASSCC.2009.5357160.

[C03]

C. Zhan and W. H. Ki, “A high-precision low-voltage low dropout regulator for SoC with adaptive biasing,” IEEE Int'l Symp. Circ. & Syst., pp. 2521-2524, May 2009 (Nominated for Best Student Paper Award). https://doi.org/10.1109/ISCAS.2009.5118314.

[C02]

C. Zhan, S. Cheng, X. Zhou and D. Zhou, “A pseudo-Gaussian filter and sigma-delta modulator for IEEE 802.11a/b/g transmitter,” IEEE Int’l Conf. ASIC, pp. 395-398, Oct. 2007. https://doi.org/10.1109/ICASIC.2007.4415650.

[C01]

C. Zhan, W. Wang, X. Zhou and D. Zhou, “A new Bandgap reference for high-resolution data converters,” IEEE Int’l Conf. Int. Tech., pp. 488-491, Mar. 2007. https://doi.org/10.1109/ICITECHNOLOGY.2007.4290525.

 

[P16]

黄奇伟,詹陈长, “一种脉冲宽度调制电路及装置”,发明专利,申请号CN109302166A,申请公布日期2019.02.01. https://patents.google.com/patent/CN109302166

[P15]

詹陈长,汤俊尧, “一种伪数字低压差线性稳压器及电源管理芯片”,发明专利,申请号CN108508958A,申请公布日期2018.09. 07. https://patents.google.com/patent/CN108508958

[P14]

詹陈长,王冠华,白祥龙,“一种低压差线性稳压器及其稳压方法”,发明专利,专利申请号CN108153364A,申请公布日期2018.06.12.

https://patents.google.com/patent/CN108153364

[P13]

詹陈长,谭艺, “基于负电荷泵增强的低压差线性稳压器和电源管理芯片”,发明专利,申请号CN109164866A,申请日期2018.8.31.

https://patents.google.com/patent/CN109164866

[P12]

黄奇伟,詹陈长,“一种全数字锁相环”,发明专利,申请号CN106301357A,申请日期2016.7.27. https://patents.google.com/patent/CN106301357

[P11]

刘阳,詹陈长,“一种整流器”,发明专利,专利号CN106100394B,授权公告日2019.04.05. https://patents.google.com/patent/CN106100394

[P10]

詹陈长,暨永雄,蔡桂港,赵双星,“低压差线性稳压器”,发明专利,专利号CN106774578B,授权公告日2018.02.27. https://patents.google.com/patent/CN106774578

[P09]

王利丹,詹陈长,“一种非带隙基准电压源”,发明专利,专利号CN105955384B,授权公告日2018.02.23. https://patents.google.com/patent/CN105955384

[P08]

詹陈长,赵双星,蔡桂港,“一种低压差线性稳压器”,发明专利,专利号CN106502302B,授权公告日2017.11.10. https://patents.google.com/patent/CN106502302

[P07]

刘阳,詹陈长,“一种基准电压源”,发明专利,专利号CN105974996B,授权公告日2017.08.08. https://patents.google.com/patent/CN105974996

[P06]

G. Zhang, H. Yu, R. Deng, C. Shen, B. Yu, X. Lu, J. Kang, X. Wang, D. Zhang and C. Zhan, "Three-dimensional one-time-programmable memory comprising off-die address/data-translator," US patent 9666300 B2, Granted, May 30, 2017. https://patents.google.com/patent/US9666300

[P05]

S. M. Saadat, C. Shi and C. Zhan, “Charge pumps having variable gain and variable frequency,” US patent 9680371 B2, Granted, Jan. 13, 2017. https://patents.google.com/patent/US9680371

[P04]

S. M. Saadat, C. Shi and C. Zhan, “Charge-recycling circuits,” US patent 9525337 B2, Granted, Dec. 20, 2016. https://patents.google.com/patent/US9525337

[P03]

Y. Liu, C. Zhan and W. H. Ki, “Voltage regulation associated with a switching converter and a set of linear regulators,” US patent 9362829 B2, Granted, Jun. 7, 2016. https://patents.google.com/patent/US9362829

[P02]

S. M. Saadat, C. Shi and C. Zhan, “Charge-recycling circuits including switching power stages with floating rails,” US patent 9276562 B2, Granted, Mar. 1, 2016. https://patents.google.com/patent/US9276562

[P01]

詹陈长,周晓方,“一种带隙基准参考源”,发明专利,专利号CN100465851C,授权公告日2009.03.04. https://patents.google.com/patent/CN100465851

 

 

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